Among many existing semiconductor packages, a chip is attached to a substrate by die-attaching layers then is encapsulated by an encapsulant through molding. When a window penetrates through the substrate for electrical connection, the encapsulant is formed on the substrate as well as inside the window. A narrow moldflow entrance at one end of the window connects the top surface of the substrate to the window, therefore, the molding pressure exerts stresses on two opposing die-attaching layers near the moldflow entrance during molding processes causing deformation or volume shrinkage of the die-attaching layer or even penetrate into the interface of the die-attaching layer leading to poor packaging qualities.
As shown in FIG. 1, a conventional window-type semiconductor package 100 primarily comprises a substrate 110, a chip 130, a die-attaching layer 140, a plurality of bonding wires 150, and an encapsulant 160. The substrate 110 includes a substrate core 120 and one layer of bottom solder mask 114. The substrate core 120 has a top surface 121, a bottom surface 122, and a slot 123 penetrating through the top surface 121 and the bottom surface 122 as a window. A die-attaching layer 140 for chip bonding is formed on the top surface 121 of the substrate core 120 of the substrate 110 as shown in FIG. 2. Since there is no solder mask disposed on the top surface 121 of the substrate core 210 so that the die-attaching layer 140 directly bonds the active surface 131 of the chip 130 to the top surface 121 of the substrate core 120. Moreover, the top surface 121 of the substrate core 120 is rough not as smooth as solder mask, therefore, the adhesion of the die-attaching layer 140 can be enhanced. According to the moldflow orientation 161 for forming the encapsulant 160, a moldflow entrance 123A is formed at one end of the slot 123 outside the die-attaching area 124 and a moldflow exit 123B is formed on the other end of the slot 123 outside the die-attaching area 124. The chip 130 has an active surface 131 with a plurality of electrodes 132 formed on the active surface 131. When the active surface 131 of the chip 130 is attached to the substrate core 120 of the substrate 110, the electrodes 132 of the chip 130 are aligned to the slot 123 and the moldflow entrance 123A and the moldflow exit 123B are not covered by the chip 130. A plurality of electrodes 132 of the chip 130 are electrically connected to the corresponding bonding fingers 117 of the substrate 110 by a plurality of bonding wires 150 passing through the slot 123. An encapsulant 160 is formed on the substrate 110 and inside the slot 123 to encapsulate the chip 130 and the bonding wires 150. A plurality of solder balls 170 are disposed on the ball pads 113 of the substrate 110. During formation of the encapsulant 160, as shown in FIG. 2, precursor of the encapsulant 160 follows the moldflow orientation 161 flows from the top surface 121 into the slot 123 through the moldflow entrance 123A and flowing out of the slot 123 through the moldflow exit 123B to completely fill the slot 123 with the encapsulant 160. The die-attaching layer 140 at two opposing sides of the moldflow entrance 123A will experience the exerted moldflow pressures to deform or shrink and will easily be scratched by the silica fillers or particles in precursor of the encapsulant 160 causing the die-attaching layer 140 located close to the moldflow entrance 123A losing stress buffering functions. More the worse, the encapsulant 160 may partially replace the die-attaching layer 140 located at two opposing sides of the moldflow entrance 123A leading to peeling of the die-attaching layer 140.
Furthermore, a conventional semiconductor package to prevent die-attaching material from contaminating the bonding pads is disclosed in Taiwan Patent No. 1291751. Solder mask disposed on a substrate core has at least a die-attaching opening for accommodating die-attaching material and forms two dam bars along two opposing sides of the wire-bonding slot to prevent contamination of bonding pads by the die-attaching material during die-attaching processes. However, it is not an effective solution to avoid the deformation or peeling of the die-attaching layer located at two opposing sides of the moldflow entrance due to moldflow pressures. Moreover, since the solder mask covers around the slot including the moldflow entrance, the opening of the moldflow entrance is even close to the chip causing larger impacts of moldflow pressure on the die-attaching layer located at two opposing sides of the moldflow entrance leading to reliability issues and poor processing yield.